Image: NOR gate layout
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NOR_gate_layout.png (600 × 433 pixels, file size: 22 KB, MIME type: image/png)
Description: Shows a CMOS implementation of a NOR gate. Also used at http://www.sccs.swarthmore.edu/users/06/adem/engin/e77vlsi/lab3/
Title: NOR gate layout
Credit: No machine-readable source provided. Own work assumed (based on copyright claims).
Author: No machine-readable author provided. Miquel puig assumed (based on copyright claims).
Usage Terms: Public domain
License: Public domain
Attribution Required?: No
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