Image: Full Adder using NAND gates
Size of this PNG preview of this SVG file: 568 × 204 pixels. Other resolution: 320 × 115 pixels.
Original image (SVG file, nominally 568 × 204 pixels, file size: 10 KB)
Description: A full adder, implemented using NAND gates. Drawn and tested using https://github.com/hneemann/Digital .
Title: Full Adder using NAND gates
Credit: Own work
Author: Trex4321
Usage Terms: Creative Commons Zero, Public Domain Dedication
License: CC0
License Link: http://creativecommons.org/publicdomain/zero/1.0/deed.en
Attribution Required?: No
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