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The Alvey Programme was a British government sponsored research programme in information technology that ran from 1984 to 1990. The programme was a reaction to the Japanese Fifth Generation project, which aimed to create a computer using massively parallel computing/processing. The programme was not focused on any specific technology such as robotics, but rather supported research in knowledge engineering in the United Kingdom. It has been likened in operations to the U.S. Defense Advanced Research Projects Agency (DARPA) and Japan's ICOT.

Background

During the early 1980s, Japan invited the United Kingdom to become a part of the Fifth Generation Project. In October 1981, a Department of Industry mission to Japan consisting of academics, civil servants and business representatives explored collaboration opportunities and attended the Fifth Generation conference. Informed by negotiations between ICL and Fujitsu conducted to "ensure the survival of ICL", suggesting that collaboration would only be possible in "very specific areas agreed upon by individual companies", it was concluded that an emulation of the Japanese approach would be preferable to any attempt at participating in the Japanese programme.

In response, a committee was created and was chaired by John Alvey, a technology director at British Telecom. The report generated proposed a different course of action to the Japanese initiative and became the basis for the UK's rejection of the Fifth Generation and the creation of its own Alvey Programme. The programme's fundamental goal was the improvement of the advanced information technology in the UK to address the declining performance of this sector. It operated in 1984 until 1990.

Alvey was not involved in the programme itself.

The main focus areas of the Alvey Programme were as follows:

Alongside these areas, the provision of a communications infrastructure was a component of the programme. Various areas of endeavour were incorporated into the main focus areas. For example, systems architecture, specifically parallel processing, featured in the VLSI endeavour.

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