Mark Dean (computer scientist) facts for kids
Quick facts for kids
Mark Dean
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Born | Jefferson City, Tennessee, United States
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March 2, 1957
Alma mater |
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Occupation | Computer engineer |
Organization | IBM |
Spouse(s) | Denise Dean |
Parent(s) | James Dean, Barbara Dean |
Mark E. Dean (born March 2, 1957) is an American inventor and computer engineer. He developed the ISA bus, and he led a design team for making a one-gigahertz computer processor chip. He holds three of nine PC patents for being the co-creator of the IBM personal computer released in 1981. In 1995, Dean was named the first ever African-American IBM Fellow.
Dean was elected as a member into the National Academy of Engineering in 2000 for innovative and pioneering contributions to personal computer development.
In 2000, Mark discussed a hand held device that would be able to display media content, like a digital newspaper. In August 2011, Dean stated that he uses a tablet computer instead of a PC in his blog.
Contents
Early life
Dean was born in Jefferson City, Tennessee. Dean displayed an affinity for technology and invention at a young age. His father, James, worked bob electrical equipment for turbines and spillways. James would often bring Mark with him on work trips, introducing him to engineering. When Mark was young, he and his dad constructed a tractor from scratch. In middle school, Mark had made up his mind on becoming a computer engineer. Dean attended Jefferson City High School in Tennessee, where he excelled in both academics and athletics. While in high school, during the 1970s, Mark built his own personal computer.
Recognition
Dean is the first African-American to become an IBM Fellow, which is the highest level of technical excellence at the company. In 1997, he was inducted into the National Inventors Hall of Fame. He was elected to the National Academy of Engineering in 2001. In 1997, Dean was awarded the Black Engineer of the Year Presidents Award. From August 2018 to July 2019, Dean was the interim dean of the UT's Tickle College of Engineering.
As of April 26, 2019, April 25 is now officially Mark Dean Day in Knox County, Tennessee.
Career
Mark graduated with a bachelors in electrical engineering during 1979. Soon after, Mark got a job at IBM as an engineer. His first task at the company was to create a word processor adapter for IBM's Datamaster terminal. During this time, he also created the ISA bus that allowed additional components to be connected to a PC. His work got him promoted in 1982 to chief engineer of PC design, where he worked with a team to develop the IBM PC. In the same year, Mark earned his master's degree in electrical engineering. 17 years later, in 1999, Dean and his team developed a gigahertz microchip, the first in the world.
Dean was an IBM Vice President overseeing the company's Almaden Research Center in San Jose, California. At one point, Mark was CTO for IBM Middle East and Africa. He retired from the company in 2013 and became a professor at University of Tennessee. Mark Dean is the John Fisher Distinguished Professor in the Department of Electrical Engineering and Computer Science at the University of Tennessee.
Dean now holds more than 20 patents, and his work led to development of the color PC monitor.
Patents
Name of Patent | Patent Number | Date of Patent |
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Color video display system having programmable border color | 4437092 | March 13, 1984 |
Composite video color signal generation from digital color signals | 4442428 | April 10, 1984 |
Microcomputer system with bus control means for peripheral processing devices | 4528626 | July 9, 1985 |
Refresh generator system for a dynamic memory | 4575826 | March 11, 1986 |
Data processing system including a main processor and a co-processor and co-processor error handling logic | 4598356 | July 1, 1986 |
Computer system including a page mode memory with decreased access time and method of operation thereof | 5034917 | July 23, 1991 |
Method and apparatus for selectively posting write cycles using the 82385 cache controller | 5045998 | September 3, 1991 |
Bidirectional buffer with latch and parity capability | 5107507 | April 21, 1992 |
Control of pipelined operation in a microcomputer system employing dynamic bus sizing with 80386 processor and 82385 cache controller | 5125084 | June 23, 1992 |
System bus preempt for 80386 when running in an 80386/82385 microcomputer system with arbitration | 5129090 | July 7, 1992 |
Microprocessor hold and lock circuitry | 5170481 | December 8, 1992 |
Delayed cache write enable circuit for a dual bus microcomputer system with an 80386 and 82385 | 5175826 | December 29, 1992 |
Data processing apparatus for selectively posting write cycles using the 82385 cache controller | 5327545 | July 5, 1994 |
Connecting a short word length non-volatile memory to a long word length address/data multiplexed bus | 5448521 | September 5, 1995 |
Microcomputer system employing address offset mechanism to increase the supported cache memory capacity | 5450559 | September 12, 1995 |
System and method for prefetching information in a processing system | 5544342 | August 6, 1996 |
Non-contiguous mapping of I/O addresses to use page protection of a process | 5548746 | August 20, 1996 |
Self-time processor with dynamic clock generator having plurality of tracking elements for outputting sequencing signals to functional units | 5553276 | September 3, 1996 |
Method and system for reading from a m-byte memory utilizing a processor having a n-byte data bus | 5603041 | February 11, 1997 |
Method and system in a distributed shared-memory data processing system for determining utilization of nodes by each executed thread | 6266745 | July 24, 2001 |
Method and system in a distributed shared-memory data processing system for determining utilization of shared-memory included within nodes by a designated application | 6336170 | January 1, 2002 |
Data storage device for recording to magnetic thread | 7206163 | April 17, 2007 |
Method and apparatus for constructing a neuroscience-inspired artificial neural network with visualization of neural pathways | 9753959 | September 5, 2017 |
Method and apparatus for constructing, using and reusing components and structures of an artificial neural network | 10019470 | July 10, 2018 |
Method and apparatus for providing random selection and long-term potentiation and depression in an artificial network | 10055434 | August 21, 2018 |
Method and apparatus for constructing a dynamic adaptive neural network array (DANNA) | 10095718 | October 9, 2018 |
Method and apparatus for providing real-time monitoring of an artificial neural network | 10248675 | April 2, 2019 |